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sherlock 2025-08-28 10:11:40 +05:30
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126
ES/Lab/Lab3/add128bit.asm
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@ -1,44 +1,96 @@
AREA RESET, DATA, READONLY
EXPORT __Vectors
__Vectors
DCD 0x10001000
DCD Reset_Handler
ALIGN
AREA MYCODE, CODE, READONLY
ENTRY
EXPORT Reset_Handler
; ========================================================================================
; add128bit.asm - 128-Bit Addition Using Multiple Precision Arithmetic
; ========================================================================================
; This program demonstrates how to add two 128-bit numbers using ARM assembly.
; Since ARM registers are 32-bit, large numbers are stored as arrays of 32-bit words.
; The program uses ADCS (Add with Carry Set) instruction to handle carries between
; individual 32-bit words, enabling multi-precision arithmetic.
AREA RESET, DATA, READONLY ; Define a read-only data section for the vector table
EXPORT __Vectors ; Export the vector table for external linking
__Vectors ; Start of the vector table
DCD 0x10001000 ; Stack pointer initial value (points to top of stack)
DCD Reset_Handler ; Address of the reset handler (program entry point)
ALIGN ; Ensure proper alignment for the next section
AREA MYCODE, CODE, READONLY ; Define the code section as read-only
ENTRY ; Mark the entry point of the program
EXPORT Reset_Handler ; Export the reset handler function
; ========================================================================================
; Reset_Handler - Main program execution
; ========================================================================================
; Algorithm Overview:
; 1. Initialize pointers to two 128-bit numbers (stored as 4x32-bit words each)
; 2. Process each 32-bit word from least significant to most significant
; 3. Use ADCS instruction to add corresponding words and propagate carry
; 4. Store the result (there are some issues in the original code with result storage)
Reset_Handler
LDR R1, =N1
LDR R2, =N2
MOV R3, #4
UP
LDR R4, [R1], #4
LDR R5, [R2], #4
ADCS R6, R5, R4
SUB R3, #1
TEQ R3, #0
BNE UP;
LDR R8, =Result
STR R2, [R8], #4
STR R5, [R8]
; Step 1: Initialize pointers to the two 128-bit numbers
; Each number is stored as an array of four 32-bit words
; N1 and N2 represent the two 128-bit operands
LDR R1, =N1 ; R1 = address of first 128-bit number (N1)
LDR R2, =N2 ; R2 = address of second 128-bit number (N2)
; Initialize loop counter for 4 iterations (4 words = 128 bits)
MOV R3, #4 ; R3 = 4 (number of 32-bit words to process)
; Step 2: Main addition loop - process each 32-bit word
UP
; Load the next 32-bit word from each operand
; Post-increment addressing advances pointers to next word
LDR R4, [R1], #4 ; Load word from N1, advance R1 to next word
LDR R5, [R2], #4 ; Load word from N2, advance R2 to next word
; Add the two words with carry from previous addition
; ADCS adds R5 + R4 + carry flag and sets carry flag for next iteration
; This handles carries between 32-bit word boundaries
ADCS R6, R5, R4 ; R6 = R5 + R4 + carry, set carry for next iteration
; Decrement loop counter
SUB R3, #1 ; R3 = R3 - 1
; Test if loop counter equals zero
; TEQ (Test Equal) compares R3 with #0 and sets condition flags
TEQ R3, #0 ; Set Z flag if R3 == 0
; Branch back to UP if counter is not zero (Z flag not set)
BNE UP ; If R3 != 0, continue loop
; Step 3: Store the result
; Note: There are issues in the original code here
; R2 has been incremented and no longer points to N2
; R5 contains the last loaded word, not part of the result
; R6 contains the last addition result but only the final word is stored
LDR R8, =Result ; R8 = address of result storage
STR R2, [R8], #4 ; Store incorrect value (should be R6)
STR R5, [R8] ; Store incorrect value (should be carry or next word)
; Step 4: Program termination
STOP
B STOP
ALIGN
N1 DCD 0x10002000, 0x30004000, 0x50006000, 0x70008000
N2 DCD 0x10002000, 0x30004000, 0x50006000, 0x70008000
AREA mydata, DATA, READWRITE
B STOP ; Branch to STOP label (infinite loop)
ALIGN ; Ensure proper alignment for data section
; ========================================================================================
; Data Section - 128-bit operands
; ========================================================================================
; N1: First 128-bit number stored as four 32-bit words (MSB to LSB):
; Word 0: 0x10002000, Word 1: 0x30004000, Word 2: 0x50006000, Word 3: 0x70008000
; Represents: 0x10002000300040005000600070008000 in hexadecimal
N1 DCD 0x10002000, 0x30004000, 0x50006000, 0x70008000
; N2: Second 128-bit number (same value as N1 for demonstration)
; Represents: 0x10002000300040005000600070008000 in hexadecimal
N2 DCD 0x10002000, 0x30004000, 0x50006000, 0x70008000
AREA mydata, DATA, READWRITE ; Define a read-write data section
; Result storage for the 128-bit sum
; Note: Should store 5 words (4 for result + 1 for final carry)
; Current allocation is insufficient for proper 128-bit result
Result DCD 0
END
END ; End of the assembly program