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16 changed files with 1319 additions and 426 deletions
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AREA RESET, DATA, READONLY
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EXPORT __Vectors
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; ========================================================================================
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; ADDER.asm - Sum of Array Elements with Carry Handling
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; ========================================================================================
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; This program demonstrates how to sum all elements of an array using ARM assembly.
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; It uses ADDS (Add Set flags) and ADC (Add with Carry) instructions to properly
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; handle carries when the sum exceeds 32 bits, enabling summation of large numbers.
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__Vectors
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DCD 0x10001000
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DCD Reset_Handler
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ALIGN
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AREA MYCODE, CODE, READONLY
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ENTRY
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EXPORT Reset_Handler
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AREA RESET, DATA, READONLY ; Define a read-only data section for the vector table
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EXPORT __Vectors ; Export the vector table for external linking
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__Vectors ; Start of the vector table
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DCD 0x10001000 ; Stack pointer initial value (points to top of stack)
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DCD Reset_Handler ; Address of the reset handler (program entry point)
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ALIGN ; Ensure proper alignment for the next section
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AREA MYCODE, CODE, READONLY ; Define the code section as read-only
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ENTRY ; Mark the entry point of the program
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EXPORT Reset_Handler ; Export the reset handler function
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; ========================================================================================
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; Reset_Handler - Main program execution
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; ========================================================================================
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; Algorithm Overview:
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; 1. Initialize pointer to the array of numbers to be summed
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; 2. Initialize accumulator registers (R2 for sum, R5 for carry/upper 32 bits)
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; 3. Process each element in the array using a loop
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; 4. Use ADDS to add each element and set carry flag
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; 5. Use ADC to add the carry to the upper 32 bits
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; 6. Store the final 64-bit sum (lower 32 bits + upper 32 bits)
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Reset_Handler
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LDR R0, =SRC
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MOV R3, #10
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; Step 1: Initialize array pointer and loop counter
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; R0 points to the beginning of the source array
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LDR R0, =SRC ; R0 = address of first element in SRC array
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; R3 holds the number of elements to sum (10 elements total)
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MOV R3, #10 ; R3 = 10 (loop counter)
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; Step 2: Main summation loop
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UP
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LDR R1, [R0], #4
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ADDS R2, R1
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ADC R5, #0
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SUBS R3, #1
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BNE UP;
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LDR R4, =Result
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STR R2, [R4]
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STR R5, [R4]
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; Load the next element from the array
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; Post-increment addressing advances R0 to the next element
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LDR R1, [R0], #4 ; Load next element into R1, advance R0
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; Add the current element to the running sum
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; ADDS adds R1 to R2 and sets condition flags including carry flag
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; This handles addition within the lower 32 bits
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ADDS R2, R1 ; R2 = R2 + R1, set carry flag if overflow
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; Add the carry from the previous addition to the upper 32 bits
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; ADC adds #0 + carry flag to R5, effectively capturing the carry
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; This extends the summation to 64 bits total
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ADC R5, #0 ; R5 = R5 + 0 + carry (from previous ADDS)
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; Decrement loop counter and set condition flags
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SUBS R3, #1 ; R3 = R3 - 1, set flags for branch condition
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; Branch back to UP if counter is not zero
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BNE UP ; If R3 != 0, continue loop
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; Step 3: Store the final result
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; The result is a 64-bit sum stored in two 32-bit words
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; R2 contains the lower 32 bits of the sum
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; R5 contains the upper 32 bits (carry accumulated from all additions)
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LDR R4, =Result ; R4 = address of result storage
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STR R2, [R4] ; Store lower 32 bits of sum
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STR R5, [R4] ; Store upper 32 bits (should be [R4, #4])
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; ========================================================================================
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; Data Section - Array of numbers to be summed
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; ========================================================================================
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; SRC array contains 10 elements to be added together:
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; Sum = 0x12345678 + 1 + 2 + 3 + 4 + 5 + 6 + 7 + 8 + 9
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; The result will be stored as a 64-bit value due to potential overflow
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SRC DCD 0x12345678, 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 0x00000006, 0x00000007, 0x00000008, 0x00000009
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AREA mydata, DATA, READWRITE
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AREA mydata, DATA, READWRITE ; Define a read-write data section
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; Result storage for the 64-bit sum
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; Should store two 32-bit words: [lower_sum, upper_sum]
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Result
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DCD 0
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END
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DCD 0 ; Space for lower 32 bits of sum
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END ; End of the assembly program
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@ -1,44 +1,96 @@
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AREA RESET, DATA, READONLY
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EXPORT __Vectors
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__Vectors
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DCD 0x10001000
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DCD Reset_Handler
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ALIGN
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AREA MYCODE, CODE, READONLY
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ENTRY
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EXPORT Reset_Handler
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; ========================================================================================
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; add128bit.asm - 128-Bit Addition Using Multiple Precision Arithmetic
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; ========================================================================================
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; This program demonstrates how to add two 128-bit numbers using ARM assembly.
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; Since ARM registers are 32-bit, large numbers are stored as arrays of 32-bit words.
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; The program uses ADCS (Add with Carry Set) instruction to handle carries between
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; individual 32-bit words, enabling multi-precision arithmetic.
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AREA RESET, DATA, READONLY ; Define a read-only data section for the vector table
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EXPORT __Vectors ; Export the vector table for external linking
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__Vectors ; Start of the vector table
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DCD 0x10001000 ; Stack pointer initial value (points to top of stack)
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DCD Reset_Handler ; Address of the reset handler (program entry point)
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ALIGN ; Ensure proper alignment for the next section
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AREA MYCODE, CODE, READONLY ; Define the code section as read-only
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ENTRY ; Mark the entry point of the program
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EXPORT Reset_Handler ; Export the reset handler function
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; ========================================================================================
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; Reset_Handler - Main program execution
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; ========================================================================================
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; Algorithm Overview:
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; 1. Initialize pointers to two 128-bit numbers (stored as 4x32-bit words each)
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; 2. Process each 32-bit word from least significant to most significant
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; 3. Use ADCS instruction to add corresponding words and propagate carry
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; 4. Store the result (there are some issues in the original code with result storage)
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Reset_Handler
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LDR R1, =N1
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LDR R2, =N2
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MOV R3, #4
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UP
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LDR R4, [R1], #4
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LDR R5, [R2], #4
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ADCS R6, R5, R4
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SUB R3, #1
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TEQ R3, #0
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BNE UP;
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LDR R8, =Result
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STR R2, [R8], #4
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STR R5, [R8]
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; Step 1: Initialize pointers to the two 128-bit numbers
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; Each number is stored as an array of four 32-bit words
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; N1 and N2 represent the two 128-bit operands
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LDR R1, =N1 ; R1 = address of first 128-bit number (N1)
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LDR R2, =N2 ; R2 = address of second 128-bit number (N2)
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; Initialize loop counter for 4 iterations (4 words = 128 bits)
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MOV R3, #4 ; R3 = 4 (number of 32-bit words to process)
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; Step 2: Main addition loop - process each 32-bit word
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UP
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; Load the next 32-bit word from each operand
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; Post-increment addressing advances pointers to next word
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LDR R4, [R1], #4 ; Load word from N1, advance R1 to next word
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LDR R5, [R2], #4 ; Load word from N2, advance R2 to next word
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; Add the two words with carry from previous addition
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; ADCS adds R5 + R4 + carry flag and sets carry flag for next iteration
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; This handles carries between 32-bit word boundaries
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ADCS R6, R5, R4 ; R6 = R5 + R4 + carry, set carry for next iteration
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; Decrement loop counter
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SUB R3, #1 ; R3 = R3 - 1
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; Test if loop counter equals zero
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; TEQ (Test Equal) compares R3 with #0 and sets condition flags
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TEQ R3, #0 ; Set Z flag if R3 == 0
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; Branch back to UP if counter is not zero (Z flag not set)
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BNE UP ; If R3 != 0, continue loop
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; Step 3: Store the result
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; Note: There are issues in the original code here
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; R2 has been incremented and no longer points to N2
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; R5 contains the last loaded word, not part of the result
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; R6 contains the last addition result but only the final word is stored
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LDR R8, =Result ; R8 = address of result storage
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STR R2, [R8], #4 ; Store incorrect value (should be R6)
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STR R5, [R8] ; Store incorrect value (should be carry or next word)
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; Step 4: Program termination
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STOP
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B STOP
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ALIGN
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N1 DCD 0x10002000, 0x30004000, 0x50006000, 0x70008000
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N2 DCD 0x10002000, 0x30004000, 0x50006000, 0x70008000
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AREA mydata, DATA, READWRITE
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B STOP ; Branch to STOP label (infinite loop)
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ALIGN ; Ensure proper alignment for data section
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; ========================================================================================
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; Data Section - 128-bit operands
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; ========================================================================================
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; N1: First 128-bit number stored as four 32-bit words (MSB to LSB):
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; Word 0: 0x10002000, Word 1: 0x30004000, Word 2: 0x50006000, Word 3: 0x70008000
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; Represents: 0x10002000300040005000600070008000 in hexadecimal
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N1 DCD 0x10002000, 0x30004000, 0x50006000, 0x70008000
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; N2: Second 128-bit number (same value as N1 for demonstration)
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; Represents: 0x10002000300040005000600070008000 in hexadecimal
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N2 DCD 0x10002000, 0x30004000, 0x50006000, 0x70008000
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AREA mydata, DATA, READWRITE ; Define a read-write data section
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; Result storage for the 128-bit sum
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; Note: Should store 5 words (4 for result + 1 for final carry)
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; Current allocation is insufficient for proper 128-bit result
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Result DCD 0
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END
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END ; End of the assembly program
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